root / proj / src / uart.c @ 270
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| 1 | 235 | up20180642 | #include <lcom/lcf.h> |
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| 2 | |||
| 3 | #include "uart.h" |
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| 4 | |||
| 5 | #include "errors.h" |
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| 6 | |||
| 7 | 249 | up20180642 | #define UART_BITRATE 115200 |
| 8 | #define UART_WAIT 20 //microseconds |
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| 9 | 241 | up20180642 | |
| 10 | 249 | up20180642 | #define UART_RBR 0 |
| 11 | #define UART_THR 0 |
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| 12 | #define UART_IER 1 |
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| 13 | #define UART_IIR 2 |
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| 14 | #define UART_FCR 2 |
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| 15 | #define UART_LCR 3 |
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| 16 | #define UART_MCR 4 |
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| 17 | #define UART_LSR 5 |
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| 18 | #define UART_MSR 6 |
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| 19 | #define UART_SR 7 |
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| 20 | 241 | up20180642 | |
| 21 | 249 | up20180642 | #define UART_DLL 0 |
| 22 | #define UART_DLM 1 |
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| 23 | 241 | up20180642 | |
| 24 | 249 | up20180642 | /// LCR
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| 25 | #define UART_BITS_PER_CHAR_POS 0 |
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| 26 | #define UART_STOP_BITS_POS 2 |
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| 27 | #define UART_PARITY_POS 3 |
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| 28 | #define UART_BREAK_CONTROL_POS 6 |
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| 29 | #define UART_DLAB_POS 7 |
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| 30 | 241 | up20180642 | |
| 31 | 249 | up20180642 | #define UART_BITS_PER_CHAR (BIT(0) | BIT(1)) |
| 32 | #define UART_STOP_BITS (BIT(2)) |
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| 33 | #define UART_PARITY (BIT(3) | BIT(4) | BIT(5)) |
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| 34 | #define UART_BREAK_CONTROL (BIT(6)) |
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| 35 | #define UART_DLAB (BIT(7)) |
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| 36 | 241 | up20180642 | |
| 37 | 249 | up20180642 | #define UART_GET_BITS_PER_CHAR(n) (((n)&UART_BITS_PER_CHAR) + 5) |
| 38 | #define UART_GET_STOP_BITS(n) (((n)&UART_STOP_BITS)? 2 : 1) |
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| 39 | #define UART_GET_PARITY(n) (((n)&UART_PARITY )>>UART_PARITY_POS )
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| 40 | #define UART_GET_BREAK_CONTROL(n) (((n)&UART_BREAK_CONTROL)>>UART_BREAK_CONTROL_POS)
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| 41 | #define UART_GET_DLAB(n) (((n)&UART_DLAB )>>UART_DLAB_POS )
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| 42 | #define UART_GET_DIV_LATCH(m,l) ((m)<<8 | (l)) |
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| 43 | #define UART_GET_DLL(n) ((n)&0xFF) |
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| 44 | #define UART_GET_DLM(n) (((n)>>8)&0xFF) |
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| 45 | 242 | up20180642 | |
| 46 | 249 | up20180642 | /// IER
|
| 47 | 252 | up20180642 | #define UART_INT_EN_RX_POS 0 |
| 48 | #define UART_INT_EN_TX_POS 1 |
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| 49 | 249 | up20180642 | #define UART_INT_EN_RECEIVER_LINE_STAT_POS 2 |
| 50 | #define UART_INT_EN_MODEM_STAT_POS 3 |
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| 51 | 242 | up20180642 | |
| 52 | 252 | up20180642 | #define UART_INT_EN_RX (BIT(0)) |
| 53 | #define UART_INT_EN_TX (BIT(1)) |
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| 54 | 249 | up20180642 | #define UART_INT_EN_RECEIVER_LINE_STAT (BIT(2)) |
| 55 | #define UART_INT_EN_MODEM_STAT (BIT(3)) |
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| 56 | 242 | up20180642 | |
| 57 | 252 | up20180642 | #define UART_GET_INT_EN_RX(n) (((n)&UART_INT_EN_RX )>>UART_INT_EN_RX_POS )
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| 58 | #define UART_GET_INT_EN_TX(n) (((n)&UART_INT_EN_TX )>>UART_INT_EN_TX_POS )
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| 59 | #define UART_GET_INT_EN_RECEIVER_LINE_STAT(n) (((n)&UART_INT_EN_RECEIVER_LINE_STAT)>>UART_INT_EN_RECEIVER_LINE_STAT_POS)
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| 60 | #define UART_GET_INT_EN_MODEM_STAT(n) (((n)&UART_INT_EN_MODEM_STAT )>>UART_INT_EN_MODEM_STAT_POS )
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| 61 | 249 | up20180642 | |
| 62 | /// LSR
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| 63 | #define UART_RECEIVER_READY_POS 0 |
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| 64 | 261 | up20180642 | #define UART_OVERRUN_ERROR_POS 1 |
| 65 | #define UART_PARITY_ERROR_POS 2 |
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| 66 | #define UART_FRAMING_ERROR_POS 3 |
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| 67 | 249 | up20180642 | #define UART_TRANSMITTER_EMPTY_POS 5 |
| 68 | |||
| 69 | #define UART_RECEIVER_READY (BIT(0)) |
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| 70 | 261 | up20180642 | #define UART_OVERRUN_ERROR (BIT(1)) |
| 71 | #define UART_PARITY_ERROR (BIT(2)) |
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| 72 | #define UART_FRAMING_ERROR (BIT(3)) |
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| 73 | 249 | up20180642 | #define UART_TRANSMITTER_EMPTY (BIT(5)) |
| 74 | |||
| 75 | #define UART_GET_RECEIVER_READY(n) (((n)&UART_RECEIVER_READY )>>UART_RECEIVER_READY_POS )
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| 76 | 261 | up20180642 | #define UART_GET_OVERRUN_ERROR (((n)&UART_OVERRUN_ERROR )>>UART_OVERRUN_ERROR_POS )
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| 77 | #define UART_GET_PARITY_ERROR (((n)&UART_PARITY_ERROR )>>UART_PARITY_ERROR_POS )
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| 78 | #define UART_GET_FRAMING_ERROR (((n)&UART_FRAMING_ERROR )>>UART_FRAMING_ERROR_POS )
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| 79 | 249 | up20180642 | #define UART_GET_TRANSMITTER_EMPTY(n) (((n)&UART_TRANSMITTER_EMPTY )>>UART_TRANSMITTER_EMPTY_POS )
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| 80 | |||
| 81 | 263 | up20180642 | int (subscribe_uart_interrupt)(uint8_t interrupt_bit, int *interrupt_id) { |
| 82 | if (interrupt_id == NULL) return 1; |
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| 83 | *interrupt_id = interrupt_bit; |
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| 84 | return (sys_irqsetpolicy(COM1_IRQ, IRQ_REENABLE | IRQ_EXCLUSIVE, interrupt_id));
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| 85 | } |
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| 86 | |||
| 87 | 252 | up20180642 | static void uart_parse_config(uart_config *config){ |
| 88 | /// LCR
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| 89 | config->bits_per_char = UART_GET_BITS_PER_CHAR (config->lcr); |
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| 90 | config->stop_bits = UART_GET_STOP_BITS (config->lcr); |
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| 91 | config->parity = UART_GET_PARITY (config->lcr); if((config->parity & BIT(0)) == 0) config->parity = uart_parity_none; |
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| 92 | config->break_control = UART_GET_BREAK_CONTROL (config->lcr); |
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| 93 | config->dlab = UART_GET_DLAB (config->lcr); |
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| 94 | /// IER
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| 95 | config->received_data_int = UART_GET_INT_EN_RX (config->ier); |
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| 96 | config->transmitter_empty_int = UART_GET_INT_EN_TX (config->ier); |
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| 97 | config->receiver_line_stat_int = UART_GET_INT_EN_RECEIVER_LINE_STAT(config->ier); |
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| 98 | config->modem_stat_int = UART_GET_INT_EN_MODEM_STAT (config->ier); |
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| 99 | /// DIV LATCH
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| 100 | config->divisor_latch = UART_GET_DIV_LATCH(config->dlm, config->dll); |
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| 101 | } |
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| 102 | |||
| 103 | static int uart_get_lcr(int base_addr, uint8_t *p){ |
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| 104 | return util_sys_inb(base_addr+UART_LCR, p);
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| 105 | } |
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| 106 | static int uart_set_lcr(int base_addr, uint8_t config){ |
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| 107 | if(sys_outb(base_addr+UART_LCR, config)) return WRITE_ERROR; |
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| 108 | return SUCCESS;
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| 109 | } |
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| 110 | static int uart_get_lsr(int base_addr, uint8_t *p){ |
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| 111 | return util_sys_inb(base_addr+UART_LSR, p);
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| 112 | } |
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| 113 | |||
| 114 | static int uart_enable_divisor_latch(int base_addr){ |
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| 115 | int ret = SUCCESS;
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| 116 | uint8_t conf; if((ret = uart_get_lcr(base_addr, &conf))) return ret; |
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| 117 | return uart_set_lcr(base_addr, conf | UART_DLAB);
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| 118 | } |
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| 119 | static int uart_disable_divisor_latch(int base_addr){ |
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| 120 | int ret = SUCCESS;
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| 121 | uint8_t conf; if((ret = uart_get_lcr(base_addr, &conf))) return ret; |
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| 122 | return uart_set_lcr(base_addr, conf & (~UART_DLAB));
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| 123 | } |
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| 124 | |||
| 125 | static int uart_get_ier(int base_addr, uint8_t *p){ |
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| 126 | int ret;
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| 127 | if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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| 128 | return util_sys_inb(base_addr+UART_IER, p);
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| 129 | } |
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| 130 | static int uart_set_ier(int base_addr, uint8_t n){ |
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| 131 | int ret;
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| 132 | if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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| 133 | if(sys_outb(base_addr+UART_IER, n)) return WRITE_ERROR; |
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| 134 | return SUCCESS;
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| 135 | } |
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| 136 | |||
| 137 | 235 | up20180642 | int uart_get_config(int base_addr, uart_config *config){ |
| 138 | int ret = SUCCESS;
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| 139 | |||
| 140 | config->base_addr = base_addr; |
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| 141 | |||
| 142 | 252 | up20180642 | if((ret = uart_get_lcr(base_addr, &config->lcr))) return ret; |
| 143 | 235 | up20180642 | |
| 144 | 252 | up20180642 | if((ret = uart_get_ier(base_addr, &config->ier))) return ret; |
| 145 | 242 | up20180642 | |
| 146 | if((ret = uart_enable_divisor_latch (base_addr))) return ret; |
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| 147 | 235 | up20180642 | if((ret = util_sys_inb(base_addr+UART_DLL, &config->dll ))) return ret; |
| 148 | if((ret = util_sys_inb(base_addr+UART_DLM, &config->dlm ))) return ret; |
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| 149 | 242 | up20180642 | if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
| 150 | 235 | up20180642 | |
| 151 | uart_parse_config(config); |
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| 152 | return ret;
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| 153 | } |
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| 154 | void uart_print_config(uart_config config){
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| 155 | 249 | up20180642 | |
| 156 | printf("%s configuration:\n", (config.base_addr == COM1_ADDR ? "COM1" : "COM2")); |
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| 157 | printf("\tLCR = 0x%X: %d bits per char\t %d stop bits\t", config.lcr, config.bits_per_char, config.stop_bits);
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| 158 | if((config.parity&BIT(0)) == 0) printf("NO parity\n"); |
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| 159 | 235 | up20180642 | else switch(config.parity){ |
| 160 | 249 | up20180642 | case uart_parity_odd : printf("ODD parity\n" ); break; |
| 161 | case uart_parity_even: printf("EVEN parity\n" ); break; |
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| 162 | 235 | up20180642 | case uart_parity_par1: printf("parity bit is 1\n"); break; |
| 163 | case uart_parity_par0: printf("parity bit is 0\n"); break; |
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| 164 | default : printf("invalid\n" ); break; |
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| 165 | } |
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| 166 | 249 | up20180642 | printf("\tDLM = 0x%02X DLL=0x%02X: bitrate = %d bps\n", config.dlm, config.dll, UART_BITRATE/config.divisor_latch);
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| 167 | printf("\tIER = 0x%02X: Rx interrupts: %s\tTx interrupts: %s\n", config.ier,
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| 168 | (config.received_data_int ? "ENABLED":"DISABLED"), |
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| 169 | (config.transmitter_empty_int ? "ENABLED":"DISABLED")); |
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| 170 | 235 | up20180642 | } |
| 171 | |||
| 172 | int uart_set_bits_per_character(int base_addr, uint8_t bits_per_char){ |
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| 173 | if(bits_per_char < 5 || bits_per_char > 8) return INVALID_ARG; |
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| 174 | int ret = SUCCESS;
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| 175 | bits_per_char = (bits_per_char-5)&0x3; |
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| 176 | 252 | up20180642 | uint8_t conf; if((ret = uart_get_lcr(base_addr, &conf))) return ret; |
| 177 | 235 | up20180642 | conf = (conf & (~UART_BITS_PER_CHAR)) | bits_per_char; |
| 178 | 252 | up20180642 | return uart_set_lcr(base_addr, conf);
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| 179 | 235 | up20180642 | } |
| 180 | int uart_set_stop_bits(int base_addr, uint8_t stop){ |
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| 181 | if(stop != 1 && stop != 2) return INVALID_ARG; |
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| 182 | int ret = SUCCESS;
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| 183 | stop -= 1;
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| 184 | stop = (stop&1)<<2; |
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| 185 | 252 | up20180642 | uint8_t conf; if((ret = uart_get_lcr(base_addr, &conf))) return ret; |
| 186 | 235 | up20180642 | conf = (conf & (~UART_STOP_BITS)) | stop; |
| 187 | 252 | up20180642 | return uart_set_lcr(base_addr, conf);
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| 188 | 235 | up20180642 | } |
| 189 | int uart_set_parity(int base_addr, uart_parity par){ |
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| 190 | int ret = SUCCESS;
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| 191 | uint8_t parity = par << 3;
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| 192 | 252 | up20180642 | uint8_t conf; if((ret = uart_get_lcr(base_addr, &conf))) return ret; |
| 193 | 235 | up20180642 | conf = (conf & (~UART_PARITY)) | parity; |
| 194 | 252 | up20180642 | return uart_set_lcr(base_addr, conf);
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| 195 | 235 | up20180642 | } |
| 196 | 241 | up20180642 | int uart_set_bit_rate(int base_addr, float bit_rate){ |
| 197 | 235 | up20180642 | int ret = SUCCESS;
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| 198 | uint16_t latch = UART_BITRATE/bit_rate; |
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| 199 | 241 | up20180642 | uint8_t dll = UART_GET_DLL(latch); |
| 200 | uint8_t dlm = UART_GET_DLM(latch); |
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| 201 | 235 | up20180642 | if((ret = uart_enable_divisor_latch(base_addr))) return ret; |
| 202 | if(sys_outb(base_addr+UART_DLL, dll)) return WRITE_ERROR; |
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| 203 | if(sys_outb(base_addr+UART_DLM, dlm)) return WRITE_ERROR; |
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| 204 | 249 | up20180642 | if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
| 205 | 235 | up20180642 | return SUCCESS;
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| 206 | } |
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| 207 | 249 | up20180642 | |
| 208 | 252 | up20180642 | static int uart_get_char(int base_addr, uint8_t *p){ |
| 209 | 249 | up20180642 | int ret;
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| 210 | if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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| 211 | return util_sys_inb(base_addr+UART_RBR, p);
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| 212 | } |
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| 213 | 252 | up20180642 | static int uart_send_char(int base_addr, uint8_t c){ |
| 214 | 249 | up20180642 | int ret;
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| 215 | if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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| 216 | 252 | up20180642 | if(sys_outb(base_addr+UART_THR, c)) return WRITE_ERROR; |
| 217 | 249 | up20180642 | return SUCCESS;
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| 218 | } |
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| 219 | 252 | up20180642 | static int uart_receiver_ready(int base_addr){ |
| 220 | 249 | up20180642 | uint8_t lsr; |
| 221 | if(uart_get_lsr(base_addr, &lsr)) return false; |
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| 222 | return UART_GET_RECEIVER_READY(lsr);
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| 223 | } |
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| 224 | 252 | up20180642 | static int uart_transmitter_empty(int base_addr){ |
| 225 | 249 | up20180642 | uint8_t lsr; |
| 226 | if(uart_get_lsr(base_addr, &lsr)) return false; |
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| 227 | return UART_GET_TRANSMITTER_EMPTY(lsr);
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| 228 | } |
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| 229 | 252 | up20180642 | |
| 230 | int uart_enable_int_rx(int base_addr){ |
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| 231 | int ret;
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| 232 | uint8_t ier; |
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| 233 | if((ret = uart_get_ier(base_addr, &ier))) return ret; |
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| 234 | ier |= UART_INT_EN_RX; |
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| 235 | return uart_set_ier(base_addr, ier);
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| 236 | } |
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| 237 | int uart_disable_int_rx(int base_addr){ |
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| 238 | int ret;
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| 239 | uint8_t ier; |
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| 240 | if((ret = uart_get_ier(base_addr, &ier))) return ret; |
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| 241 | ier &= ~UART_INT_EN_RX; |
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| 242 | return uart_set_ier(base_addr, ier);
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| 243 | } |
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| 244 | int uart_enable_int_tx(int base_addr){ |
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| 245 | int ret;
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| 246 | uint8_t ier; |
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| 247 | if((ret = uart_get_ier(base_addr, &ier))) return ret; |
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| 248 | ier |= UART_INT_EN_TX; |
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| 249 | return uart_set_ier(base_addr, ier);
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| 250 | } |
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| 251 | int uart_disable_int_tx(int base_addr){ |
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| 252 | int ret;
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| 253 | uint8_t ier; |
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| 254 | if((ret = uart_get_ier(base_addr, &ier))) return ret; |
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| 255 | ier &= ~UART_INT_EN_TX; |
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| 256 | return uart_set_ier(base_addr, ier);
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| 257 | } |
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| 258 | |||
| 259 | 269 | up20180642 | /*static*/ int uart_has_communication_error(int base_addr){ |
| 260 | 249 | up20180642 | int ret;
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| 261 | 261 | up20180642 | uint8_t lsr; |
| 262 | if((ret = uart_get_lsr(base_addr, &lsr))) return 1; |
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| 263 | lsr &= (UART_OVERRUN_ERROR & |
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| 264 | UART_PARITY_ERROR & |
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| 265 | UART_FRAMING_ERROR); |
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| 266 | return (lsr ? 1 : 0); |
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| 267 | } |
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| 268 | |||
| 269 | #include "nctp.h" |
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| 270 | |||
| 271 | #define NCTP_START 0x80 |
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| 272 | #define NCTP_END 0xFF |
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| 273 | #define NCTP_TRIES 3 |
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| 274 | #define NCTP_OK 0xFF |
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| 275 | #define NCTP_NOK 0x00 |
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| 276 | #define NCTP_MAX_SIZE 1024 //in bytes |
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| 277 | |||
| 278 | int nctp_send_char_poll(int base_addr, uint8_t c){ |
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| 279 | for(int i = 0; i < NCTP_TRIES; ++i) |
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| 280 | if(uart_transmitter_empty(base_addr))
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| 281 | return uart_send_char(base_addr, c);
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| 282 | return TIMEOUT_ERROR;
|
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| 283 | } |
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| 284 | int nctp_get_char_poll (int base_addr, uint8_t *p){ |
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| 285 | for(int i = 0; i < NCTP_TRIES; ++i) |
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| 286 | if(uart_receiver_ready(base_addr))
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| 287 | return uart_get_char(base_addr, p);
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| 288 | return TIMEOUT_ERROR;
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| 289 | } |
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| 290 | |||
| 291 | int nctp_expect_ok(int base_addr){ |
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| 292 | int ret;
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| 293 | uint8_t ok; |
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| 294 | if((ret = nctp_get_char_poll(base_addr, &ok))) return ret; |
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| 295 | int cnt = 0; |
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| 296 | while(ok){
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| 297 | cnt += ok&1;
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| 298 | ok >>= 1;
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| 299 | } |
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| 300 | if(cnt > 4) return SUCCESS; |
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| 301 | else return NOK; |
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| 302 | } |
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| 303 | |||
| 304 | int nctp_send_char_try(int base_addr, uint8_t c){ |
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| 305 | int ret;
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| 306 | for(size_t k = 0; k < NCTP_TRIES; ++k){ |
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| 307 | if((ret = nctp_send_char_poll(base_addr, c))) return ret; |
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| 308 | 269 | up20180642 | return SUCCESS;
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| 309 | //if(nctp_expect_ok(base_addr) == SUCCESS) return SUCCESS;
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| 310 | 261 | up20180642 | } |
| 311 | return TRANS_FAILED;
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| 312 | } |
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| 313 | int nctp_get_char_try (int base_addr, uint8_t *p){ |
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| 314 | int ret;
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| 315 | for(size_t k = 0; k < NCTP_TRIES; ++k){ |
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| 316 | if((ret = nctp_get_char_poll (base_addr, p))) return ret; |
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| 317 | 269 | up20180642 | return SUCCESS;
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| 318 | //if(!uart_has_communication_error(base_addr))
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| 319 | //return nctp_send_char_try(base_addr, NCTP_OK ); //If it does not have any errors
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| 320 | 261 | up20180642 | } |
| 321 | if((ret = nctp_send_char_poll(base_addr, NCTP_NOK))) return ret; |
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| 322 | return TRANS_FAILED;
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| 323 | } |
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| 324 | |||
| 325 | 269 | up20180642 | static int nctp_send_inner(int base_addr, size_t num, uint8_t* ptr[], size_t sz[]){ |
| 326 | 261 | up20180642 | {
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| 327 | int cnt = 0; |
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| 328 | for(size_t i = 0; i < num; ++i){ |
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| 329 | cnt += sz[i]; |
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| 330 | if(cnt > NCTP_MAX_SIZE) return TRANS_REFUSED; |
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| 331 | } |
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| 332 | } |
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| 333 | |||
| 334 | int ret;
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| 335 | |||
| 336 | if((ret = nctp_send_char_try(base_addr, NCTP_START))) return ret; |
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| 337 | for(size_t i = 0; i < num; ++i){ |
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| 338 | uint8_t *p = ptr[i]; size_t s = sz[i]; |
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| 339 | for(size_t j = 0; j < s; ++j, ++p) |
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| 340 | if((ret = nctp_send_char_try(base_addr, *p)))
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| 341 | return ret;
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| 342 | } |
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| 343 | if((ret = nctp_send_char_try(base_addr, NCTP_END))) return ret; |
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| 344 | |||
| 345 | 249 | up20180642 | return SUCCESS;
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| 346 | } |
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| 347 | 269 | up20180642 | int nctp_send(int base_addr, size_t num, uint8_t* ptr[], size_t sz[]){ |
| 348 | int ret;
|
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| 349 | if((ret = uart_disable_int_rx(base_addr))) return ret; |
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| 350 | if((ret = uart_disable_int_tx(base_addr))) return ret; |
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| 351 | int r = nctp_send_inner(base_addr, num, ptr, sz);
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| 352 | if((ret = uart_enable_int_rx(base_addr))) return ret; |
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| 353 | if((ret = uart_disable_int_tx(base_addr))) return ret; |
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| 354 | return r;
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| 355 | } |
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| 356 | 261 | up20180642 | |
| 357 | 269 | up20180642 | static int nctp_get_inner(int base_addr, uint8_t **dest){ |
| 358 | 249 | up20180642 | int ret;
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| 359 | 269 | up20180642 | free(*dest); |
| 360 | *dest = malloc(NCTP_MAX_SIZE*sizeof(uint8_t)); size_t i = 0; |
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| 361 | if(*dest == NULL) return NULL_PTR; |
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| 362 | 261 | up20180642 | uint8_t c; |
| 363 | if((ret = nctp_get_char_try (base_addr, &c ))) return ret; |
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| 364 | while(true){ |
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| 365 | if(i >= NCTP_MAX_SIZE) return TRANS_REFUSED; |
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| 366 | if((ret = nctp_get_char_try (base_addr, &c))) return ret; |
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| 367 | 269 | up20180642 | if(c == NCTP_END) return SUCCESS; |
| 368 | else (*dest)[i++] = c;
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| 369 | 261 | up20180642 | } |
| 370 | 249 | up20180642 | } |
| 371 | 269 | up20180642 | int nctp_get(int base_addr, uint8_t **dest){ |
| 372 | int ret;
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| 373 | if((ret = uart_disable_int_rx(base_addr))) return ret; |
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| 374 | if((ret = uart_disable_int_tx(base_addr))) return ret; |
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| 375 | int r = nctp_get_inner(base_addr, dest);
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| 376 | if((ret = uart_enable_int_rx(base_addr))) return ret; |
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| 377 | if((ret = uart_disable_int_tx(base_addr))) return ret; |
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| 378 | return r;
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| 379 | } |