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1 | 234 | up20180655 | #include "rtc.h" |
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2 | #include "rtc_macros.h" |
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3 | |||
4 | #include <lcom/lcf.h> |
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5 | |||
6 | #include "utils.h" |
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7 | #include "errors.h" |
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8 | |||
9 | 259 | up20180642 | // RTC IRQ Line
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10 | |||
11 | #define KBC_IRQ 8 /* @brief KBC IRQ Line */ |
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12 | |||
13 | // RTC Ports
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14 | |||
15 | #define RTC_ADDR_REG 0x70 |
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16 | #define RTC_DATA_REG 0x71 |
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17 | |||
18 | // RTC Registers (Byte)
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19 | |||
20 | #define RTC_SEC 0 |
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21 | #define RTC_SEC_ALARM 1 |
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22 | #define RTC_MIN 2 |
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23 | #define RTC_MIN_ALARM 3 |
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24 | #define RTC_HOUR 4 |
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25 | #define RTC_HOUR_ALARM 5 |
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26 | #define RTC_WEEK_DAY 6 |
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27 | #define RTC_MONTH_DAY 7 |
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28 | #define RTC_MONTH 8 |
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29 | #define RTC_YEAR 9 |
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30 | #define RTC_REG_A 10 |
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31 | #define RTC_REG_B 11 |
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32 | #define RTC_REG_C 12 |
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33 | #define RTC_REG_D 13 |
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34 | |||
35 | // Register A
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36 | |||
37 | #define RS0 BIT(0) /** @brief Rate selector */ |
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38 | #define RS1 BIT(1) /** @brief Rate selector */ |
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39 | #define RS2 BIT(2) /** @brief Rate selector */ |
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40 | #define RS3 BIT(3) /** @brief Rate selector */ |
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41 | #define UIP BIT(7) /** @brief Update in progress */ |
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42 | |||
43 | // Register B
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44 | |||
45 | #define DSE BIT(0) /** @brief Enable Daylight Saving Time */ |
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46 | #define HOUR_FORM BIT(1) /** @brief Set to 1 for 24h format (0-23), 0 to 12h format (1-12) */ |
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47 | #define DM BIT(2) /** @brief Set to 1 if registers are in binary, 0 if in BCD */ |
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48 | #define SQWE BIT(3) /** @brief Enable square wave generation */ |
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49 | #define UIE BIT(4) /** @brief Enable Update interrupts */ |
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50 | #define AIE BIT(5) /** @brief Enable alarm interrupts */ |
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51 | #define PIE BIT(6) /** @brief Enable periodic interrupts */ |
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52 | #define SET BIT(7) /** @brief Set to 1 to inhibit updates of time/date registers */ |
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53 | |||
54 | // Register C
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55 | |||
56 | #define UF BIT(4) /** @brief Update Interrupt Pending */ |
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57 | #define AF BIT(5) /** @brief Alarm Interrupt Pending */ |
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58 | #define PF BIT(6) /** @brief Periodic Interrupt Pending */ |
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59 | #define IRQF BIT(7) /** @brief IRQ Line Active */ |
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60 | |||
61 | // Register D
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62 | |||
63 | #define VRT BIT(7) /** @brief Valid RAM/time - If set to 0 RTC reading aren't valid */ |
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64 | |||
65 | 234 | up20180655 | int (subscribe_rtc_interrupt)(uint8_t interrupt_bit, int *interrupt_id) { |
66 | if (interrupt_id == NULL) return NULL_PTR; |
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67 | *interrupt_id = interrupt_bit; |
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68 | if (sys_irqsetpolicy(KBC_IRQ, IRQ_REENABLE | IRQ_EXCLUSIVE, interrupt_id)) return SBCR_ERROR; |
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69 | return SUCCESS;
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70 | } |
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71 | |||
72 | int (rtc_read_register)(uint32_t reg, uint8_t *data) {
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73 | if (sys_outb(RTC_ADDR_REG, reg)) return WRITE_ERROR; |
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74 | |||
75 | if (util_sys_inb(RTC_DATA_REG, data)) return READ_ERROR; |
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76 | |||
77 | return SUCCESS;
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78 | } |
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79 | |||
80 | int (rtc_write_register)(uint32_t reg, uint8_t data) {
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81 | if (sys_outb(RTC_ADDR_REG, reg)) return WRITE_ERROR; |
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82 | |||
83 | if (sys_outb(RTC_DATA_REG, data)) return WRITE_ERROR; |
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84 | |||
85 | return SUCCESS;
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86 | } |
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87 | |||
88 | int (rtc_check_update)(void) { |
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89 | uint8_t data; |
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90 | int r;
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91 | |||
92 | if ((r = rtc_read_register(RTC_REG_A, &data))) return r; |
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93 | |||
94 | return (data & UIP) != 0; |
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95 | } |
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96 | |||
97 | int (rtc_set_updates)(int on) { |
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98 | uint8_t data; |
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99 | int r;
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100 | if (on) {
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101 | if ((r = rtc_read_register(RTC_REG_B, &data))) return r; |
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102 | |||
103 | data &= ~SET; |
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104 | |||
105 | if ((r = rtc_write_register(RTC_REG_B, data))) return r; |
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106 | |||
107 | } else {
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108 | while (rtc_check_update());
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109 | |||
110 | if ((r = rtc_read_register(RTC_REG_B, &data))) return r; |
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111 | |||
112 | data |= SET; |
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113 | |||
114 | if ((r = rtc_write_register(RTC_REG_B, data))) return r; |
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115 | } |
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116 | return SUCCESS;
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117 | } |
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118 | |||
119 | int (rtc_read_time)(uint8_t *time) {
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120 | |||
121 | int r;
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122 | //if ((r = rtc_set_updates(false))) return r;
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123 | while (rtc_check_update());
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124 | |||
125 | uint8_t hour, min, sec; |
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126 | |||
127 | if ((r = rtc_read_register(RTC_SEC, &sec))) return r; |
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128 | if ((r = rtc_read_register(RTC_MIN, &min))) return r; |
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129 | if ((r = rtc_read_register(RTC_HOUR, &hour))) return r; |
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130 | |||
131 | //if ((r = rtc_set_updates(true))) return r;
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132 | |||
133 | time[0] = BCD_FIRST(sec)*10 + BCD_SECOND(sec); |
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134 | time[1] = BCD_FIRST(min)*10 + BCD_SECOND(min); |
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135 | time[2] = BCD_FIRST(hour)*10 + BCD_SECOND(hour); |
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136 | |||
137 | return SUCCESS;
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138 | } |
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139 | |||
140 | int (rtc_read_date)(uint8_t *date) {
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141 | int r;
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142 | //if ((r = rtc_set_updates(false))) return r;
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143 | while (rtc_check_update());
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144 | |||
145 | uint8_t year, month, day, weekday; |
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146 | |||
147 | if ((r = rtc_read_register(RTC_WEEK_DAY, &weekday))) return r; |
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148 | if ((r = rtc_read_register(RTC_MONTH_DAY, &day))) return r; |
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149 | if ((r = rtc_read_register(RTC_MONTH, &month))) return r; |
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150 | if ((r = rtc_read_register(RTC_YEAR, &year))) return r; |
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151 | |||
152 | //if ((r = rtc_set_updates(true))) return r;
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153 | |||
154 | date[0] = weekday;
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155 | date[1] = BCD_FIRST(day)*10 + BCD_SECOND(day); |
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156 | date[2] = BCD_FIRST(month)*10 + BCD_SECOND(month); |
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157 | date[3] = BCD_FIRST(year)*10 + BCD_SECOND(year); |
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158 | |||
159 | return SUCCESS;
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160 | } |