root / proj / src / uart.c @ 250
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#include <lcom/lcf.h> |
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#include "uart.h" |
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#include "errors.h" |
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#define UART_BITRATE 115200 |
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#define UART_WAIT 20 //microseconds |
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#define UART_RBR 0 |
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#define UART_THR 0 |
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#define UART_IER 1 |
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#define UART_IIR 2 |
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#define UART_FCR 2 |
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#define UART_LCR 3 |
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#define UART_MCR 4 |
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#define UART_LSR 5 |
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#define UART_MSR 6 |
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#define UART_SR 7 |
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#define UART_DLL 0 |
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#define UART_DLM 1 |
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/// LCR
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#define UART_BITS_PER_CHAR_POS 0 |
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#define UART_STOP_BITS_POS 2 |
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#define UART_PARITY_POS 3 |
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#define UART_BREAK_CONTROL_POS 6 |
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#define UART_DLAB_POS 7 |
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#define UART_BITS_PER_CHAR (BIT(0) | BIT(1)) |
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#define UART_STOP_BITS (BIT(2)) |
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#define UART_PARITY (BIT(3) | BIT(4) | BIT(5)) |
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#define UART_BREAK_CONTROL (BIT(6)) |
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#define UART_DLAB (BIT(7)) |
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#define UART_GET_BITS_PER_CHAR(n) (((n)&UART_BITS_PER_CHAR) + 5) |
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#define UART_GET_STOP_BITS(n) (((n)&UART_STOP_BITS)? 2 : 1) |
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#define UART_GET_PARITY(n) (((n)&UART_PARITY )>>UART_PARITY_POS )
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#define UART_GET_BREAK_CONTROL(n) (((n)&UART_BREAK_CONTROL)>>UART_BREAK_CONTROL_POS)
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#define UART_GET_DLAB(n) (((n)&UART_DLAB )>>UART_DLAB_POS )
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#define UART_GET_DIV_LATCH(m,l) ((m)<<8 | (l)) |
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#define UART_GET_DLL(n) ((n)&0xFF) |
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#define UART_GET_DLM(n) (((n)>>8)&0xFF) |
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/// IER
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#define UART_INT_EN_RECEIVED_DATA_POS 0 |
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#define UART_INT_EN_TRANSMITTER_EMPTY_POS 1 |
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#define UART_INT_EN_RECEIVER_LINE_STAT_POS 2 |
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#define UART_INT_EN_MODEM_STAT_POS 3 |
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#define UART_INT_EN_RECEIVED_DATA (BIT(0)) |
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#define UART_INT_EN_TRANSMITTER_EMPTY (BIT(1)) |
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#define UART_INT_EN_RECEIVER_LINE_STAT (BIT(2)) |
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#define UART_INT_EN_MODEM_STAT (BIT(3)) |
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#define UART_INT_EN_GET_RECEIVED_DATA(n) (((n)&UART_INT_EN_RECEIVED_DATA )>>UART_INT_EN_RECEIVED_DATA_POS )
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#define UART_INT_EN_GET_TRANSMITTER_EMPTY(n) (((n)&UART_INT_EN_TRANSMITTER_EMPTY )>>UART_INT_EN_TRANSMITTER_EMPTY_POS )
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#define UART_INT_EN_GET_RECEIVER_LINE_STAT(n) (((n)&UART_INT_EN_RECEIVER_LINE_STAT)>>UART_INT_EN_RECEIVER_LINE_STAT_POS)
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#define UART_INT_EN_GET_MODEM_STAT(n) (((n)&UART_INT_EN_MODEM_STAT )>>UART_INT_EN_MODEM_STAT_POS )
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/// LSR
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#define UART_RECEIVER_READY_POS 0 |
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#define UART_TRANSMITTER_EMPTY_POS 5 |
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#define UART_RECEIVER_READY (BIT(0)) |
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#define UART_TRANSMITTER_EMPTY (BIT(5)) |
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#define UART_GET_RECEIVER_READY(n) (((n)&UART_RECEIVER_READY )>>UART_RECEIVER_READY_POS )
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#define UART_GET_TRANSMITTER_EMPTY(n) (((n)&UART_TRANSMITTER_EMPTY )>>UART_TRANSMITTER_EMPTY_POS )
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int uart_get_config(int base_addr, uart_config *config){ |
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int ret = SUCCESS;
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config->base_addr = base_addr; |
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if((ret = util_sys_inb(base_addr+UART_LCR, &config->lcr))) return ret; |
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if((ret = util_sys_inb(base_addr+UART_IER, &config->ier))) return ret; |
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if((ret = uart_enable_divisor_latch (base_addr))) return ret; |
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if((ret = util_sys_inb(base_addr+UART_DLL, &config->dll ))) return ret; |
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if((ret = util_sys_inb(base_addr+UART_DLM, &config->dlm ))) return ret; |
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if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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uart_parse_config(config); |
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return ret;
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} |
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void uart_parse_config(uart_config *config){
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/// LCR
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config->bits_per_char = UART_GET_BITS_PER_CHAR (config->lcr); |
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config->stop_bits = UART_GET_STOP_BITS (config->lcr); |
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config->parity = UART_GET_PARITY (config->lcr); if((config->parity & BIT(0)) == 0) config->parity = uart_parity_none; |
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config->break_control = UART_GET_BREAK_CONTROL (config->lcr); |
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config->dlab = UART_GET_DLAB (config->lcr); |
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/// IER
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config->received_data_int = UART_INT_EN_GET_RECEIVED_DATA (config->ier); |
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config->transmitter_empty_int = UART_INT_EN_GET_TRANSMITTER_EMPTY (config->ier); |
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config->receiver_line_stat_int = UART_INT_EN_GET_RECEIVER_LINE_STAT(config->ier); |
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config->modem_stat_int = UART_INT_EN_GET_MODEM_STAT (config->ier); |
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/// DIV LATCH
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config->divisor_latch = UART_GET_DIV_LATCH(config->dlm, config->dll); |
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} |
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void uart_print_config(uart_config config){
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printf("%s configuration:\n", (config.base_addr == COM1_ADDR ? "COM1" : "COM2")); |
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printf("\tLCR = 0x%X: %d bits per char\t %d stop bits\t", config.lcr, config.bits_per_char, config.stop_bits);
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if((config.parity&BIT(0)) == 0) printf("NO parity\n"); |
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else switch(config.parity){ |
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case uart_parity_odd : printf("ODD parity\n" ); break; |
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case uart_parity_even: printf("EVEN parity\n" ); break; |
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case uart_parity_par1: printf("parity bit is 1\n"); break; |
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case uart_parity_par0: printf("parity bit is 0\n"); break; |
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default : printf("invalid\n" ); break; |
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} |
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printf("\tDLM = 0x%02X DLL=0x%02X: bitrate = %d bps\n", config.dlm, config.dll, UART_BITRATE/config.divisor_latch);
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printf("\tIER = 0x%02X: Rx interrupts: %s\tTx interrupts: %s\n", config.ier,
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(config.received_data_int ? "ENABLED":"DISABLED"), |
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(config.transmitter_empty_int ? "ENABLED":"DISABLED")); |
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} |
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int uart_enable_divisor_latch(int base_addr){ |
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int ret = SUCCESS;
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uint8_t conf; if((ret = util_sys_inb(base_addr+UART_LCR, &conf))) return ret; |
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return uart_write_config(base_addr, conf | UART_DLAB);
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} |
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int uart_disable_divisor_latch(int base_addr){ |
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int ret = SUCCESS;
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uint8_t conf; if((ret = util_sys_inb(base_addr+UART_LCR, &conf))) return ret; |
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return uart_write_config(base_addr, conf & (~UART_DLAB));
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} |
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int uart_write_config(int base_addr, uint8_t config){ |
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if(sys_outb(base_addr+UART_LCR, config)) return WRITE_ERROR; |
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return SUCCESS;
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} |
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int uart_set_bits_per_character(int base_addr, uint8_t bits_per_char){ |
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if(bits_per_char < 5 || bits_per_char > 8) return INVALID_ARG; |
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int ret = SUCCESS;
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bits_per_char = (bits_per_char-5)&0x3; |
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uint8_t conf; if((ret = util_sys_inb(base_addr+UART_LCR, &conf))) return ret; |
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conf = (conf & (~UART_BITS_PER_CHAR)) | bits_per_char; |
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return uart_write_config(base_addr, conf);
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} |
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int uart_set_stop_bits(int base_addr, uint8_t stop){ |
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if(stop != 1 && stop != 2) return INVALID_ARG; |
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int ret = SUCCESS;
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stop -= 1;
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stop = (stop&1)<<2; |
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uint8_t conf; if((ret = util_sys_inb(base_addr+UART_LCR, &conf))) return ret; |
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conf = (conf & (~UART_STOP_BITS)) | stop; |
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return uart_write_config(base_addr, conf);
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} |
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int uart_set_parity(int base_addr, uart_parity par){ |
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int ret = SUCCESS;
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uint8_t parity = par << 3;
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uint8_t conf; if((ret = util_sys_inb(base_addr+UART_LCR, &conf))) return ret; |
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conf = (conf & (~UART_PARITY)) | parity; |
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return uart_write_config(base_addr, conf);
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} |
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int uart_set_bit_rate(int base_addr, float bit_rate){ |
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int ret = SUCCESS;
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uint16_t latch = UART_BITRATE/bit_rate; |
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uint8_t dll = UART_GET_DLL(latch); |
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uint8_t dlm = UART_GET_DLM(latch); |
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if((ret = uart_enable_divisor_latch(base_addr))) return ret; |
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if(sys_outb(base_addr+UART_DLL, dll)) return WRITE_ERROR; |
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if(sys_outb(base_addr+UART_DLM, dlm)) return WRITE_ERROR; |
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if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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return SUCCESS;
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} |
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/// PRIVATE
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int uart_get_lsr(int base_addr, uint8_t *p){ |
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return util_sys_inb(base_addr+UART_LSR, p);
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} |
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/**
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* @brief Get char from RBR.
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*/
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int uart_get_char(int base_addr, uint8_t *p){ |
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int ret;
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if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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return util_sys_inb(base_addr+UART_RBR, p);
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} |
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int uart_send_char(int base_addr, uint8_t c){ |
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int ret;
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if((ret = uart_disable_divisor_latch(base_addr))) return ret; |
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if(sys_outb(base_addr, c)) return WRITE_ERROR; |
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return SUCCESS;
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} |
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int uart_receiver_ready(int base_addr){ |
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uint8_t lsr; |
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if(uart_get_lsr(base_addr, &lsr)) return false; |
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return UART_GET_RECEIVER_READY(lsr);
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} |
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int uart_transmitter_empty(int base_addr){ |
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uint8_t lsr; |
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if(uart_get_lsr(base_addr, &lsr)) return false; |
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return UART_GET_TRANSMITTER_EMPTY(lsr);
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} |
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///PUBLIC
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int uart_get_char_poll(int base_addr, uint8_t *p){ |
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int ret;
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while(!uart_receiver_ready(base_addr)){}
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if((ret = uart_get_char(base_addr, p))) return ret; |
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return SUCCESS;
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} |
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int uart_send_char_poll(int base_addr, uint8_t c){ |
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int ret;
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while(!uart_transmitter_empty(base_addr)){}
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if((ret = uart_send_char(base_addr, c))) return ret; |
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return SUCCESS;
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} |
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int uart_send_memory_poll(int base_addr, void *str, size_t n){ |
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int ret;
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uint8_t *p = str; |
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for(size_t i = 0; i < n; ++i, ++p){ |
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if((ret = uart_send_char_poll(base_addr, *p))) return ret; |
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} |
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return SUCCESS;
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} |