root / proj / include / rtc_macros.h @ 250
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| 1 | 234 | up20180655 | #ifndef RTC_MACROS_H_INCLUDED
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| 2 | #define RTC_MACROS_H_INCLUDED
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| 3 | |||
| 4 | #include <lcom/lcf.h> |
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| 5 | |||
| 6 | // RTC IRQ Line
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| 7 | |||
| 8 | #define KBC_IRQ 8 /* @brief KBC IRQ Line */ |
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| 9 | |||
| 10 | // RTC Ports
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| 11 | |||
| 12 | #define RTC_ADDR_REG 0x70 |
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| 13 | #define RTC_DATA_REG 0x71 |
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| 14 | |||
| 15 | // RTC Registers (Byte)
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| 16 | |||
| 17 | #define RTC_SEC 0 |
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| 18 | #define RTC_SEC_ALARM 1 |
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| 19 | #define RTC_MIN 2 |
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| 20 | #define RTC_MIN_ALARM 3 |
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| 21 | #define RTC_HOUR 4 |
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| 22 | #define RTC_HOUR_ALARM 5 |
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| 23 | #define RTC_WEEK_DAY 6 |
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| 24 | #define RTC_MONTH_DAY 7 |
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| 25 | #define RTC_MONTH 8 |
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| 26 | #define RTC_YEAR 9 |
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| 27 | #define RTC_REG_A 10 |
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| 28 | #define RTC_REG_B 11 |
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| 29 | #define RTC_REG_C 12 |
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| 30 | #define RTC_REG_D 13 |
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| 31 | |||
| 32 | // Register A
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| 33 | |||
| 34 | #define RS0 BIT(0) /** @brief Rate selector */ |
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| 35 | #define RS1 BIT(1) /** @brief Rate selector */ |
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| 36 | #define RS2 BIT(2) /** @brief Rate selector */ |
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| 37 | #define RS3 BIT(3) /** @brief Rate selector */ |
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| 38 | #define UIP BIT(7) /** @brief Update in progress */ |
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| 39 | |||
| 40 | // Register B
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| 41 | |||
| 42 | #define DSE BIT(0) /** @brief Enable Daylight Saving Time */ |
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| 43 | #define HOUR_FORM BIT(1) /** @brief Set to 1 for 24h format (0-23), 0 to 12h format (1-12) */ |
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| 44 | #define DM BIT(2) /** @brief Set to 1 if registers are in binary, 0 if in BCD */ |
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| 45 | #define SQWE BIT(3) /** @brief Enable square wave generation */ |
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| 46 | #define UIE BIT(4) /** @brief Enable Update interrupts */ |
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| 47 | #define AIE BIT(5) /** @brief Enable alarm interrupts */ |
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| 48 | #define PIE BIT(6) /** @brief Enable periodic interrupts */ |
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| 49 | #define SET BIT(7) /** @brief Set to 1 to inhibit updates of time/date registers */ |
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| 50 | |||
| 51 | // Register C
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| 52 | |||
| 53 | #define UF BIT(4) /** @brief Update Interrupt Pending */ |
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| 54 | #define AF BIT(5) /** @brief Alarm Interrupt Pending */ |
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| 55 | #define PF BIT(6) /** @brief Periodic Interrupt Pending */ |
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| 56 | #define IRQF BIT(7) /** @brief IRQ Line Active */ |
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| 57 | |||
| 58 | // Register D
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| 59 | |||
| 60 | #define VRT BIT(7) /** @brief Valid RAM/time - If set to 0 RTC reading aren't valid */ |
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| 61 | |||
| 62 | #endif /* end of include guard: RTC_MACROS_H_INCLUDED */ |