root / lab4 / .minix-src / include / x86 / mtrr.h @ 13
History | View | Annotate | Download (4.77 KB)
1 | 13 | up20180614 | /* $NetBSD: mtrr.h,v 1.5 2011/12/15 09:38:21 abs Exp $ */
|
---|---|---|---|
2 | |||
3 | /*-
|
||
4 | * Copyright (c) 2000 The NetBSD Foundation, Inc.
|
||
5 | * All rights reserved.
|
||
6 | *
|
||
7 | * This code is derived from software contributed to The NetBSD Foundation
|
||
8 | * by Bill Sommerfeld
|
||
9 | *
|
||
10 | * Redistribution and use in source and binary forms, with or without
|
||
11 | * modification, are permitted provided that the following conditions
|
||
12 | * are met:
|
||
13 | * 1. Redistributions of source code must retain the above copyright
|
||
14 | * notice, this list of conditions and the following disclaimer.
|
||
15 | * 2. Redistributions in binary form must reproduce the above copyright
|
||
16 | * notice, this list of conditions and the following disclaimer in the
|
||
17 | * documentation and/or other materials provided with the distribution.
|
||
18 | *
|
||
19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
|
||
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
|
||
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
|
||
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
|
||
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
||
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
||
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||
29 | * POSSIBILITY OF SUCH DAMAGE.
|
||
30 | */
|
||
31 | |||
32 | #ifndef _X86_MTRR_H_
|
||
33 | #define _X86_MTRR_H_
|
||
34 | |||
35 | #define MTRR_I686_FIXED_IDX64K 0 |
||
36 | #define MTRR_I686_FIXED_IDX16K 1 |
||
37 | #define MTRR_I686_FIXED_IDX4K 3 |
||
38 | |||
39 | #define MTRR_I686_NVAR_MAX 16 /* could be upto 255? */ |
||
40 | |||
41 | #define MTRR_I686_64K_START 0x00000 |
||
42 | #define MTRR_I686_16K_START 0x80000 |
||
43 | #define MTRR_I686_4K_START 0xc0000 |
||
44 | |||
45 | #define MTRR_I686_NFIXED_64K 1 |
||
46 | #define MTRR_I686_NFIXED_16K 2 |
||
47 | #define MTRR_I686_NFIXED_4K 8 |
||
48 | #define MTRR_I686_NFIXED 11 |
||
49 | #define MTRR_I686_NFIXED_SOFT_64K (MTRR_I686_NFIXED_64K * 8) |
||
50 | #define MTRR_I686_NFIXED_SOFT_16K (MTRR_I686_NFIXED_16K * 8) |
||
51 | #define MTRR_I686_NFIXED_SOFT_4K (MTRR_I686_NFIXED_4K * 8) |
||
52 | #define MTRR_I686_NFIXED_SOFT (MTRR_I686_NFIXED * 8) |
||
53 | |||
54 | #define MTRR_I686_ENABLE_MASK 0x0800 |
||
55 | #define MTRR_I686_FIXED_ENABLE_MASK 0x0400 |
||
56 | |||
57 | #define MTRR_I686_CAP_VCNT_MASK 0x00ff |
||
58 | #define MTRR_I686_CAP_FIX_MASK 0x0100 |
||
59 | #define MTRR_I686_CAP_WC_MASK 0x0400 |
||
60 | |||
61 | #define MTRR_TYPE_UC 0 |
||
62 | #define MTRR_TYPE_WC 1 |
||
63 | #define MTRR_TYPE_UNDEF1 2 |
||
64 | #define MTRR_TYPE_UNDEF2 3 |
||
65 | #define MTRR_TYPE_WT 4 |
||
66 | #define MTRR_TYPE_WP 5 |
||
67 | #define MTRR_TYPE_WB 6 |
||
68 | |||
69 | struct mtrr_state {
|
||
70 | uint32_t msraddr; |
||
71 | uint64_t msrval; |
||
72 | }; |
||
73 | |||
74 | #define MTRR_PRIVATE 0x0001 /* 'own' range, reset at exit */ |
||
75 | #define MTRR_FIXED 0x0002 /* use fixed range mtrr */ |
||
76 | #define MTRR_VALID 0x0004 /* entry is valid */ |
||
77 | |||
78 | #define MTRR_CANTSET MTRR_FIXED
|
||
79 | |||
80 | #define MTRR_I686_MASK_VALID (1 << 11) |
||
81 | |||
82 | /*
|
||
83 | * AMD K6 MTRRs.
|
||
84 | *
|
||
85 | * There are two of these MTRR-like registers in the UWCRR.
|
||
86 | */
|
||
87 | |||
88 | #define MTRR_K6_ADDR_SHIFT 17 |
||
89 | #define MTRR_K6_ADDR (0x7fffU << MTRR_K6_ADDR_SHIFT) |
||
90 | #define MTRR_K6_MASK_SHIFT 2 |
||
91 | #define MTRR_K6_MASK (0x7fffU << MTRR_K6_MASK_SHIFT) |
||
92 | #define MTRR_K6_WC (1U << 1) /* write-combine */ |
||
93 | #define MTRR_K6_UC (1U << 0) /* uncached */ |
||
94 | |||
95 | #define MTRR_K6_NVAR 2 |
||
96 | |||
97 | #ifdef _KERNEL
|
||
98 | |||
99 | #define mtrr_base_value(mtrrp) \
|
||
100 | (((uint64_t)(mtrrp)->base) | ((uint64_t)(mtrrp)->type)) |
||
101 | #define mtrr_mask_value(mtrrp) \
|
||
102 | ((~((mtrrp)->len - 1) & 0x0000000ffffff000LL)) |
||
103 | |||
104 | |||
105 | #define mtrr_len(val) \
|
||
106 | ((~((val) & 0x0000000ffffff000LL)+1) & 0x0000000ffffff000LL) |
||
107 | #define mtrr_base(val) ((val) & 0x0000000ffffff000LL) |
||
108 | #define mtrr_type(val) ((uint8_t)((val) & 0x00000000000000ffLL)) |
||
109 | #define mtrr_valid(val) (((val) & MTRR_I686_MASK_VALID) != 0) |
||
110 | |||
111 | struct proc;
|
||
112 | struct mtrr;
|
||
113 | |||
114 | void i686_mtrr_init_first(void); |
||
115 | void k6_mtrr_init_first(void); |
||
116 | |||
117 | struct mtrr_funcs {
|
||
118 | void (*init_cpu)(struct cpu_info *ci); |
||
119 | void (*reload_cpu)(struct cpu_info *ci); |
||
120 | void (*clean)(struct proc *p); |
||
121 | int (*set)(struct mtrr *, int *n, struct proc *p, int flags); |
||
122 | int (*get)(struct mtrr *, int *n, struct proc *p, int flags); |
||
123 | void (*commit)(void); |
||
124 | void (*dump)(const char *tag); |
||
125 | }; |
||
126 | |||
127 | extern struct mtrr_funcs i686_mtrr_funcs; |
||
128 | extern struct mtrr_funcs k6_mtrr_funcs; |
||
129 | extern struct mtrr_funcs *mtrr_funcs; |
||
130 | |||
131 | #define mtrr_init_cpu(ci) mtrr_funcs->init_cpu(ci)
|
||
132 | #define mtrr_reload_cpu(ci) mtrr_funcs->reload_cpu(ci)
|
||
133 | #define mtrr_clean(p) mtrr_funcs->clean(p)
|
||
134 | #define mtrr_set(mp,n,p,f) mtrr_funcs->set(mp,n,p,f)
|
||
135 | #define mtrr_get(mp,n,p,f) mtrr_funcs->get(mp,n,p,f)
|
||
136 | #define mtrr_dump(s) mtrr_funcs->dump(s)
|
||
137 | #define mtrr_commit() mtrr_funcs->commit()
|
||
138 | |||
139 | #define MTRR_GETSET_USER 0x0001 |
||
140 | #define MTRR_GETSET_KERNEL 0x0002 |
||
141 | |||
142 | #endif /* _KERNEL */ |
||
143 | |||
144 | struct mtrr {
|
||
145 | uint64_t base; /* physical base address */
|
||
146 | uint64_t len; |
||
147 | uint8_t type; |
||
148 | int flags;
|
||
149 | pid_t owner; /* valid if MTRR_PRIVATE set in flags */
|
||
150 | }; |
||
151 | |||
152 | #endif /* _X86_MTRR_H_ */ |