root / lab4 / .minix-src / include / minix / cpufeature.h @ 13
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1 | 13 | up20180614 | |
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2 | #ifndef _MINIX_CPUFEATURE_H
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3 | #define _MINIX_CPUFEATURE_H 1 |
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4 | |||
5 | #define _CPUF_I386_FPU 0 /* FPU-x87 FPU on Chip */ |
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6 | #define _CPUF_I386_PSE 1 /* Page Size Extension */ |
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7 | #define _CPUF_I386_PGE 2 /* Page Global Enable */ |
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8 | #define _CPUF_I386_APIC_ON_CHIP 3 /* APIC is present on the chip */ |
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9 | #define _CPUF_I386_TSC 4 /* Timestamp counter present */ |
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10 | #define _CPUF_I386_SSE1234_12 5 /* Support for SSE/SSE2/SSE3/SSSE3/SSE4 |
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11 | * Extensions and FXSR
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12 | */
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13 | #define _CPUF_I386_FXSR 6 |
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14 | #define _CPUF_I386_SSE 7 |
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15 | #define _CPUF_I386_SSE2 8 |
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16 | #define _CPUF_I386_SSE3 9 |
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17 | #define _CPUF_I386_SSSE3 10 |
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18 | #define _CPUF_I386_SSE4_1 11 |
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19 | #define _CPUF_I386_SSE4_2 12 |
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20 | |||
21 | #define _CPUF_I386_HTT 13 /* Supports HTT */ |
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22 | #define _CPUF_I386_HTT_MAX_NUM 14 /* Maximal num of threads */ |
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23 | |||
24 | #define _CPUF_I386_MTRR 15 |
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25 | #define _CPUF_I386_SYSENTER 16 /* Intel SYSENTER instrs */ |
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26 | #define _CPUF_I386_SYSCALL 17 /* AMD SYSCALL instrs */ |
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27 | |||
28 | #define _CPUF_I386_PAE 18 /* Page Address Extension */ |
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29 | |||
30 | int _cpufeature(int featureno); |
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31 | |||
32 | #endif |